1. Field of the Invention
The present invention relates to a manufacturing method of a thin film resistor, and more particularly, to a manufacturing method of a thin film resistor which can be constructed on an insulating layer and which is made of metal silicides having a low temperature coefficient of resistance ("TCR"), and in which sheet resistance can be easily controlled.
2. Description of the Related Art
Generally, the electrical characteristics of a resistor in an integrated circuit ("IC") are greatly dependent on a TCR that indicates thermal stability against thermal variations due to circumferential temperature changes or current flow. A high TCR indicates instability. Therefore, a resistor having a high TCR has a large variance of resistance values according to temperature changes, resulting in a poor quality IC. Accordingly, a resistor made of materials having a low or zero TCR is used in an IC which requires a precise resistivity.
Resistors are generally classified into three types. The first is a diffused resistor manufactured by doping impurities such as boron, phosphorous or arsenic into a silicon substrate. The second is a polysilicon resistor manufactured by doping impurities into polysilicon deposited on an insulating layer on a silicon substrate. Finally, the third is a thin film resistor manufactured by depositing metal silicides on an insulating layer on a silicon substrate and in which a desired resistance value is obtained by controlling the composition ratio of the metal silicides.
Of these IC resistors, the diffused resistor is not generally preferred because it has a low sheet resistance and therefore occupies a relatively wide area of a semiconductor substrate. The sheet resistance of the polysilicon resistor can controlled more easily and can be formed as multiple layers on an insulating layer, but has a high TCR.
The thin film resistor can control the sheet resistance easily and can be formed on the insulating layer. It also has a lower relative TCR. But the thin film resistor requires a barrier metal layer for preventing a thin film of metal silicides from oxidizing.
FIGS. 1A to 1E are cross-sectional views showing a conventional manufacturing process stages of a thin film resistor.
As seen from FIG. 1A, after a contact region 23 is formed on a semiconductor substrate 1 by a conventional method, an insulating layer 3 is formed on semiconductor substrate 1 by way of chemical vapor deposition ("CVD") or thermal oxidation. The insulating layer 3 is made of silicon oxide or silicon nitride. A resistor layer 11 and a interlayer 13 are formed on the insulating layer 3 by sputtering or CVD.
Preferably, the resistor layer 11 is made of metal silicides such as chromium or tantalum silicide and has a thickness of about 100 to 1000 .ANG.. The interlayer 13 is made from a refractory metal, i.e., titanium, tungsten, cobalt, molybdenum or platinum, or their alloys. Interlayer 13 prevents the contact resistance of the resistor layer 11 from being increased by oxidation with metal. After that, a photoresist pattern 9 is formed on the interlayer 13 by a conventional photolithography method.
The interlayer 13 and the resistor layer 11 are sequentially removed by dry or wet etching except for the region masked by the photoresist pattern 9.
As seen from FIG. 1B, after the photoresist pattern 9 is removed, a photoresist layer 15 is formed on the surface of insulating layer 3, including the resistor layer 11 and the interlayer 13, which are thus not subsequently etched. Then, an opening 20 is formed through the photoresist layer 15 above the contact region 23. The insulating layer 3 is etched through this opening.
As seen from FIG. 1C, after the photoresist layer 15 is removed, a metal layer 17 is formed on the surface of the structure by depositing aluminum or an alloy thereof by way of sputtering to be in contact with the contact region 23.
As seen from FIG. 1D, after forming another photoresist layer 19 on the metal layer 17 by a conventional photolithography method, an opening 22 is formed therein above the metal layer 17 above the interlayer 13. Next, the portion of the metal layer 17 and the interlayer 13 under the window are removed by dry or wet etching.
As seen from FIG. 1E, after the photoresist 19 is removed, a conventional heat treatment is then applied to reduce the contact resistance between the resistor layer 11 and the interlayer 13, and between the interlayer 13 and the metal layer 17.
A passivation layer 21 is then formed on the surface of the structure by depositing an insulating material, such as boro-phospho silicate glass, phospho-silicate glass, or silicon nitride.
In a conventional manufacturing method of a thin film resistor, the contact resistance between the resistor layer and the metal layer is increased because a native oxide layer forms on the resistor layer exposed to air. Occasionally, the resistance can be decreased by forming an alloy with the metal layer. An interlayer should, in theory, solve these problems, but it increases production costs and complicates the etching processes of the metal layer and the interlayer. Moreover, because the oxide layer is not easily removed by hydrofluoride, it must removed by RF sputtering. The device's characteristics are thus degraded from the effect of RF sputtering on the exposed.
In addition, a native oxide layer forms on the semiconductor contact region 23, thereby insulating the metal layer 17 from the contact region 23. If the native oxide layer on the contact region is removed by hydrofluoride before depositing the metal layer 17 to solve the problem of insulation, then side-etching of the resistor layer 11 by the hydrofluoride necessarily occurs, which changes the resistance of the resistor layer.
FIGS. 2A to 2D are cross-sectional views showing a manufacturing process of another conventional thin film resistor, which is disclosed in Korean Patent Application No. 91-14613.
As seen from FIG. 2A, an insulator 33 is formed on a substrate 31. The insulator 33 is made of silicon oxide or silicon nitride and the substrate 31 is made of silicon or glass material, such as boro-phospho-silicate glass ("BPSG"), phospho silicate glass ("PSG"), or undoped silicate glass ("USG").
A metal layer 35 is formed on the insulator 33. The metal layer is made of aluminum or an alloy thereof. At this time, a metal oxide layer 36 forms on the metal layer 35 because the metal layer 35 exposed to air is quickly oxidized.
A photoresist layer 37, is formed on the metal layer 35, then removed from predetermined parts to provide an opening 28.
As seen from FIG. 2B, the native metal oxide layer 36 and the metal layer 35 are etched by dry or wet etching through the opening 28 to expose the insulating layer 33.
As seen from FIG. 2C, the photoresist layer 37 is removed, and the remaining metal oxide layer 36 on the metal layer 35 is removed by RF sputtering. Next, a resistor layer 39 of metal silicides such as chromium or tantalum silicide is deposited in-situ on the surface of the structure by physical deposition or CVD to define a resistor layer about 100 to 1000 .ANG. thick. A photoresist pattern 41 is thereafter formed on the resistor layer 39. At this time, the resistor layer 39 may be exposed to air, but the resultant oxidation layer on the surface of the resistor layer 39 is less than 50 .ANG. thick. It does not significantly influence the resistance value of the resistor layer 39 because the resistor layer 39 is in ohmic contact with the metal layer 35.
As seen from FIG. 2D, the resistor layer 39 is etched by utilizing the photoresist pattern 41 as a mask. The remaining resistor layer becomes the desired thin film resistor. The photoresist pattern 41 is next removed. The substrate 31 then undergoes heat treatment of about 400.degree. to 450.degree. C. to reduce the contact resistance between the newly etched resistor layer 40 and the metal layer 35. A newly etched passivation layer 43 is then formed on the surface of the structure by an insulating material of glass, such as BPSG, PSG or USG.
According to the conventional thin film resistor described above, the metal layer formed under the resistor layer is either corroded or eroded, or the metal layer is etched at the time of the etching of the resistor layer, thereby causing defects in the metal interconnection layer.